Different semiconductor devices may be fabricated to have one or more different device characteristics, such as switching speed, leakage power consumption, etc. Multiple different designs may each provide optimization of one or more of these characteristics for devices intended to perform specific functions. For instance, one design may increase switching speed for devices providing computational logic functions, and another design may decrease power consumption for devices providing memory storage functions. A system using multiple discrete devices optimized for different functions presents challenges in terms of system complexity, system footprint and cost.
A semiconductor device can be provided by a discrete device, e.g., a field effect transistor (FET), a diode, and resistor. A semiconductor device can be provided by a structure, e.g., a wafer, a die, an integrated circuit having one or a plurality of discrete semiconductor devices.
Optimization challenges are pronounced with continued miniaturization of semiconductor devices. A FET short channel effect can occur when a channel length is reduced to length on an order of magnitude of a source and drain depletion region dimension. With short channel effects present, FET performance can be rendered more difficult to control.
Various FET architectures have been proposed for addressing the short channel effect. In ultra thin body (UTB) architecture, a FET is formed on an ultrathin layer (e.g., 2 nm-20 nm). In a FinFET architecture, a bulk silicon substrate can be recessed to define fins on which a wrap around gate can be formed to reduce a short channel effect.